Mithuna Thottethodi's Publications:

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Conference Papers:

  1. S. A. R. Jafri, Y. -J. Hong, M. Thottethodi, T. N. Vijaykumar,“Adaptive Flow Control for Robust Performance and Energy,” Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Computer Architecture (MICRO-2010), December 2010, pages 433-444. Acceptance Rate: 45/258 (17%)
  1. T. Pritchett, M. Thottethodi, “SieveStore: A Highly-Selective , Ensemble-level Disk Cache for Cost-Performance,” Proceedings of the 37th International Symposium on Computer Architecture (ISCA-2010), June 2010, pages 163-174. (pdf) Acceptance Rate: 44/245 (18%)
  1. S. A. R. Jafri, M. Thottethodi, T. N. Vijaykumar, “LiteTM: Reducing Transactional State Overhead,” Proceedings of the Sixteenth International Symposium on High Performance Computer Architecture (HPCA-16), pages 81- 92, January 2010. (pdf) Acceptance Rate: 32/175 (18%)
  2. M.C. Johnson, E. Villasenor, O. Krachina, M. Thottethodi, “Undergraduate Dual-Core Prototyping and Analysis of Factors Influencing Student Success on Dual-Core Designs,” Proceedings of IEEE International Conference on Microelectronic Systems Education, pages 1-4, July 2009. Acceptance Rate (Excluding Poster presentations): 9/43 (21%)
  3. D. Seo and M. Thottethodi, “Disjoint-Path Routing: Efficient Communication for Streaming Applications”, Proceedings of the 23rd IEEE International Parallel and Distributed Processing Symposium (IPDPS), 1-12 May 2009. (link, pdf, bib) Acceptance Rate: 100/440 (23%)
  4. H.-S. Chuang, A. M. Amin, S. T. Wereley, M. Thottethodi, T. N. Vijaykumar and S. C. Jacobson, “Polydimethylsiloxane (PDMS) Peristaltic Pump Characterization for Programmable Lab-on-a-Chip Applications”, Proceedings of the 12th International Conference on Miniaturized Systems for Chemistry and Life Sciences (µTAS 2008). Acceptance Rate: 658/1118 (59%)
  5. E. Villasenor, D. Seo, M. Thottethodi, “Power-Efficient Clustering via Incomplete Bypassing,” Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED-2008), Aug 2008, pages 369-374. (link, pdf, bib) Acceptance Rate (Excluding Poster presentations): 50/159 (31%)
  6. A. Amin, M. Thottethodi, T. N. Vijaykumar, S. T. Wereley, S. C. Jacobson, “Automatic Volume Management in Programmable Microfluidics,” Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI-2008), June 2008, pages 56-67. (link, pdf, bib) Acceptance Rate: 34/184 (18%)
  7. W. –T. Lim, M. Thottethodi, “Evaluating ISA support and Hardware Support for Recursive Data Layouts”, Proceedings of the 14th Annual IEEE International Conference on High Performance Computing (HiPC 2007), Dec 2007, pages 95-106. (link, bib) Acceptance Rate: 52/253 (21%)
  8. A. Amin, M. Thottethodi, T.N. Vijaykumar, S.T. Wereley, S.C. Jacobson, “Aquacore: A General-Purpose Architecture for Programmable Microfluidics”, Proceedings of the 11th International Conference on Miniaturized Systems for Chemistry and Life Sciences (µTAS 2007), Oct 2007. (pdf,bib) Acceptance Rate: 601/979 (61%)
  9. N. Rafique, W.-T. Lim, M. Thottethodi, “Effective Management of DRAM Bandwidth in Multicore Processors”, Proceedings of the 16th International Conference on Parallel Architectures and Compilation Technology (PACT 2007), Sep 2007, pages 245-258. (link, pdf, bib) Acceptance Rate: 34/175 (19%)
  10. A. Amin, M. Thottethodi, T.N. Vijaykumar, S.T. Wereley, S.C. Jacobson, “AquaCore: A Programmable Architecture for Microfluidics”, Proceedings of the 34th International Symposium on Computer Architecture (ISCA-2007), June 2007, pages 254-265. (link, pdf, bib) Acceptance Rate: 46/204 (23%)
  11. D. Seo, M. Thottethodi, “Table-lookup based Crossbar Arbitration for Minimal-Routed, 2D Mesh and Torus Networks," Proceedings of the 21st IEEE International Parallel and Distributed Processing Symposium (IPDPS), March 2007. (pdf

, bib) Acceptance Rate: 109/419 (26%)

  1. N. Rafique, W.-T. Lim, M. Thottethodi, “Architectural Support for Operating System-Driven CMP Cache Management," Proceedings of the 15th International Conference on Parallel Architectures and Compilation Technology (PACT 2006), pages 2-12, Sep 2006. (pdf, bib) Acceptance Rate: 30/117 (26%)
  2. D. Seo, A. Ali, W.-T. Lim, N. Rafique, M. Thottethodi, “Near-Optimal Worst-case Throughput Routing in Two Dimensional Mesh Networks", Proceedings of the 32nd International Symposium on Computer Architecture (ISCA-2005), pages 432-443, June 2005. (pdf, bib) Acceptance Rate: 45/194 (23%)
  3. M. Thottethodi, A. R. Lebeck, S. Mukherjee, “BLAM : A High-Performance Routing Algorithm for Virtual Cut-Through Networks", 17th International Parallel and Distributed Processing Symposium (IPDPS), April 2003. (pdf, bib) Acceptance Rate: 119/407 (29%)
  4. M. S. Thottethodi, A. R. Lebeck, S. Mukherjee, “Self-Tuned Congestion Control for Multiprocessor Networks", Seventh International Symposium on High Performance Computer Architecture (HPCA-7), January 2001. (pdf, bib) Acceptance Rate: 26/110 (24%)
  5. A. R. Lebeck, D. R. Raymond, C. Yang, M. S. Thottethodi, “Annotated Memory References: A Mechanism for Informed Cache Management", Euro-Par '99, August 1999. (pdf, bib) Acceptance Rate: (54%)
  6. S. Chatterjee, A. R. Lebeck, P. K. Patnala, M. S. Thottethodi, “Recursive Array Layouts and Fast Matrix Multiplication", 11th ACM Symposium on Parallel Algorithms and Architectures (SPAA '99), June 1999. (pdf, bib) Acceptance Rate: 26/90 (29%)
  7. S. Chatterjee, V. Jain, A. R. Lebeck, S. Mundhra, M. S. Thottethodi, “Nonlinear Array Layouts for Hierarchical Memory Systems", 13th ACM International Conference on Supercomputing (ICS '99), June 1999. (pdf, bib) Acceptance Rate: 57/180 (32%)
  8. Mithuna S. Thottethodi, Siddhartha Chatterjee, and Alvin R. Lebeck , “Tuning Strassen's Matrix Multiplication For Memory Efficiency", Supercomputing '98, November 1998 (Best Student Paper Finalist) (pdf, bib) Acceptance Rate: (20%)

Journal Papers:

  1. P. Ndai, N. Rafique, M. Thottethodi, S. Ghosh, S. Bhunia, K. Roy, “Trifecta: A Non-Speculative Scheme to Exploit Common, Data-Dependent Subcritical Paths,” IEEE Transactions on Very Large Scale Integration Systems (IEEE TVLSI), (accepted for publication, to appear, link)
  2. M. S. Thottethodi, A. R. Lebeck, S. Mukherjee, “Exploiting Global Knowledge to Achieve Self-Tuned Congestion Control for k-ary n-cube Networks",IEEE Transactions on Parallel and Distributed Systems (IEEE TPDS), 15(3), pages 257—272, March 2004. (link, bib)
  3. S. Chatterjee, A. R. Lebeck, Praveen K. Patnala, M. Thottethodi, “Recursive Array Layouts and Fast Parallel Matrix Multiplication", IEEE Transactions on Parallel and Distributed Systems (IEEE TPDS), 13(11), pages 1105—1123, November 2002. (link, bib)

Technical Reports:

1.       “Architectural Support for Operating System-Driven CMP Cache Management," N. Rafique, W.-T. Lim, M. Thottethodi, Technical Report TR-ECE-06-11, June 2006, School of Electrical and Computer Engineering, Purdue University.

2.       “Near-Optimal Worst-case Throughput Routing in Two Dimensional Mesh Networks", D. Seo, A. Ali, W.-T. Lim, N. Rafique, M. Thottethodi, Technical Report TR-ECE 05-03, March, 2005, School of Electrical and Computer Engineering, Purdue University.

3.       “Key Components of High-Performance Routing Algorithms for Virtual Cut-Through Networks", M. S. Thottethodi, A. R. Lebeck, S. S. Mukherjee, Technical Report CS-2002-02, January 2002, Department of Computer Science, Duke University.

4.       “Self-Tuned Congestion Control for Multiprocessor Networks", M. S. Thottethodi, A. R. Lebeck, S. Mukherjee, Technical Report CS-2000-15, November 2000, Department of Computer Science, Duke University.

5.       “Annotated Memory References: A Mechanism for Informed Cache Management", Alvin R. Lebeck, David R. Raymond, Mithuna S. Thottethodi, Technical Report CS-1998-02, Febrary 1998, Department of Computer Science, Duke University.